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FPGA / Hardware Design enginer

Location:
San Jose, CA 
Area Code:
408 
Telecommute:
no 
Travel Required:
none 
Skills:
FPGA, System Verilog, UVM ,PCIe, DV, Asic Design,ethernet switch, serdes, Asic design, FPGA, Serdes, Ethernet, Hardware design, hardware Design 
Pay Rate:
Open 
Tax Term:
CON_IND CON_W2 
Length:
Contract- 12 months 
Date Posted:
9-29-2016 
Position ID:
436077 
Dice ID:
10108150 

 FP

If you are interested and avauilable to pursue this opportunity ,please email an updated resume' to sudha@intelliswift.com 

 

INTELLISWIFT INC

36900 Ballentine Drive , Suite # 200

Newark,CA

 Phone: 510.648 4302
Email: sudha@intelliswift.com
www.intelliswift.com

 

FPGA /Hardware Design Engineer 2 year contract  (long term)  San Jose,CA  

  • Development of at least 2 large FPGA from concept to production (spec, register definition and coding, Verilog RTL, synthesis, timing closure, debug, release to MFG)
  • PCIe design knowledge (Gen1 and Gen2 at minimum)
  •  some knowledge  of 10G serdes operation
  • Knowledge of leading edge microprocessor based design
  • Good lab hands-on skills, scope, analyzer
  • Good cross-functional team skills
  • Knowledge of at least 1 verification language and
  • Basic DV with test bench  ( the project infrastrcure is  already in place)    E.g. generate test cases.  (test plan, test vector generation, debug, regression)
  • Knowledge of test bench generation
  • 9 + years of Hardware design /FPGA  experience  

  .

If you are qualified, available, interested, planning to make a change, email  sudha@intelliswift .com an updated resume' and call me at 510 648 4302 

 

Contact

Sudha P

Intelliswift Software Inc.

39600 Balentine drive , Newark, CA - 94560

sudha@intelliswift.com

www.intelliswift.com

 

 

 

 

Intelliswift Software Inc
39600 Balentine Dr
Ste 200
Newark, CA 94560